1 ? fn7455.1 preliminary el8186 micropower single s upply rail-to-rail input-output op amp the el8186 is a micropower operational amplifier optimized for single supply operation at 5v and can operate down to 2.4v. the el8186 draws minimal supply current while meeting excellent dc-accuracy noise and output drive specifications. competing devices seriously degrade these parameters to achieve micropower supply current. offset current, voltage and current noise, slew rate, and gain-bandwidth product are all two to ten times better than on previous micropower op amps. the 1/f corner of the voltage no ise spectrum is at 1khz. this results in low frequency noise performance which can only be found on devices with an order of magnitude higher supply current. the el8186 can be operated from one lithium cell or two ni-cd batteries. the input range includes both positive and negative rail. the output swings to both rails. features ? 55a supply current ? 400v typical offset voltage ? 500pa input bias current ? 700khz gain-bandwidth product ? 0.13v/s slew rate ? single supply operation down to 2.4v ? rail-to-rail input and output ? output sources and si nks 26ma load current applications ? battery- or solar-powered systems ? 4ma to 25ma current loops ? handheld consumer products ? medical devices ? thermocouple amplifiers ? photodiode pre amps ? ph probe amplifiers pinouts el8186 (6-pin sot-23) top view el8286* (10-pin msop, dfn) top view ordering information part number package tape & reel pkg. dwg. # el8186iw-t7 6-pin sot-23 7? (3k pcs) mdp0038 el8186iw-t7a 6-pin sot-23 7? (250 pcs) mdp0038 EL8286IY (note) 10-pin msop - mdp0043 el8286il (note) 10-pin dfn - mdp0047 note: contact factory for availability 1 2 3 6 4 5 +- out vs- in+ vs+ enable in- - + - + ina+ cea vs- ceb ina- outa vs+ outb inb+ inb- 1 2 3 4 10 9 8 7 5 6 *coming soon data sheet january 11, 2005 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-352-6832 | intersil (and design) is a registered trademark of intersil americas inc. copyright intersil americas inc. 2004, 2005. all rights reserved all other trademarks mentioned are the property of their respective owners.
2 fn7455.1 january 11, 2005 absolute maxi mum ratings (t a = 25c) supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5v differential input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5v input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5v to v s + 0.5v output short-circuit duration . . . . . . . . . . . . . . . . . . . . . . .indefinite ambient operating temperature range . . . . . . . . . .-40c to +85c storage temperature range . . . . . . . . . . . . . . . . . .-65c to +150c caution: stresses above those listed in ?absolute maximum ratings? may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. important note: all parameters having min/max specifications are guaranteed. typical values are for information purposes only. u nless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: t j = t c = t a electrical specifications v s = 5v, 0v, v cm = 0.1v, v o = 1.4v, t a = 25c unless otherwise specified. parameter description conditions min typ max unit v os input offset voltage 0.4 1 mv long term input offset voltage stability tbd v/mo input offset drift vs temperature 1.5 v/c i os input offset current 0.4 1.2 na i b input bias current 0.5 2 na e n input noise voltage density f o = 1khz 25 nv/ hz i n input noise current density f o = 1khz 0.1 pa/ hz cmir input voltage range guaranteed by cmrr test 0 5 v cmrr common-mode rejection ratio v cm = 0v to 5v 90 110 db psrr power supply rejection ratio v s = 2.4v to 5v 90 110 db a vol large signal voltage gain v o = 0.5v to 4.5v, r l = 100k ? 200 500 v/mv v o = 0.5v to 4.5v, r l = 1k ? 25 v/mv v out maximum output voltage swing output low, r l = 100k ? 36mv output low, r l = 1k ? 130 200 mv output high, r l = 100k ? 4.994 4.997 v output high, r l = 1k ? 4.8 4.88 v sr slew rate 0.07 0.13 0.16 v/s gbw gain bandwidth product a v = 1 700 khz i s,on supply current, enabled 40 55 75 a i s,off supply current, disabled 310a i o + short circuit output current r l = 10 ? 18 31 ma i o - short circuit output current r l = 10 ? 17 26 ma v s minimum supply voltage 2.2 2.4 v v inh enable pin high level 2v v inl enable pin low level 0.8 v i enh enable pin input current v en = 5v 0.25 0.7 2 a i enl enable pin input current v en = 0v -0.5 0 +0.5 a ? v os ? time ------------------ ? v os ? t --------------- - el8186
3 fn7455.1 january 11, 2005 typical performance curves figure 1. frequency response vs supply voltage f igure 2. frequency response vs supply voltage figure 3. supply current vs supply voltage fig ure 4. open loop gain + phase vs frequency figure 5. input offset voltage vs output voltag e figure 6. input offset voltage vs common-mode input voltage a v =1 r l =10k ? c l =2.7pf r f =100 ? r g =open -8 gain (db) 4 8 -4 0 100 10k 100k 10m frequency (hz) 1k 1m v s =1.0v v s =1.25v v s =2.5v a v =100 r l =10k ? c l =2.7pf r f /r g =99.02 r f =221k ? r g =2.23k ? 0 gain (db) 15 20 25 40 45 30 35 5 10 100 10k 100k 1m frequency (hz) 1k v s =1.0v v s =1.25v v s =2.5v 23.545.5 supply voltage (v) 2.5 5 4.5 3 0 supply current (a) 20 50 60 30 40 10 -80 gain (db) 20 40 60 120 140 80 100 -40 0 1 1k 100k 10m frequency (hz) 10 -60 -20 -120 phase () 100 80 60 40 20 0 -20 -40 -60 -80 10k 1m 100 -100 -200 input offset voltage (v) -100 0 150 200 50 100 05 output voltage (v) 13 24 v dd =2.5v v dd =5v v cm =v dd /2 a v =-1 -150 -50 -100 input offset voltage (v) -80 -20 0 -60 -40 05 common-mode input voltage (v) 13 24 v os , v el8186
4 fn7455.1 january 11, 2005 figure 7. input bias + offset currents vs common- mode input voltage figure 8. package power dissipation vs ambient temperature figure 9. package power dissipation vs ambient temperature typical performance curves 1 input bias, offset currents (pa) 1k 10k 10 100 05 common-mode input voltage (v) 13 24 i b + i os i b - jedec jesd51-3 low effective thermal conductivity test board 391mw ja =256 c/w sot23-6 0 100 125 150 0 ambient temperature (c) power dissipation (w) 50 0.05 0.1 0.15 0.4 0.45 0.2 0.3 25 75 85 0.35 0.25 jedec jesd51-7 high effective thermal conductivity test board 435mw j a = 2 3 0 c / w s o t 2 3 - 6 0 100 125 150 0 ambient temperature (c) power dissipation (w) 50 0.05 0.1 0.15 0.45 0.5 0.2 0.3 25 75 85 0.35 0.25 0.4 el8186
5 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn7455.1 january 11, 2005 applications information introduction the el8186 is a rail-to-rail micropower operational amplifier. the device eliminates concerns introduced by traditional rail- to-rail i/o operation making it ideal for portable and single- supply design. rail-to-rail input stage the el8186 achieves rail-to-rail input operation without introducing errors or degrading performance. the el8186 has a single differential-pair bipolar pnp input stage (ground-sensing amplifier) aided by a charge pump to increase upper common-mode range amplification up to the positive rail. the pnp differential pair remains active throughout the entire input common-mode voltage range eliminating a drastic shift in offset voltage and offset current as the common-mode approaches either rail. since there is no common-mode threshold crossover, unlike a conventional paralleled pnp and npn rail-to-rail input stage amplifier, the el8186's offset voltage, and input offset current exhibit an undistorted and smooth behavior over the common-mode input range. in general, bipolar amplifiers have higher bias currents if intended for high-speed operation. the bipolar pnp input bias currents of the el8186 are decimated down to a typical of 500pa while maintaining an excellent bandwidth for a micropower operational amplifier. inside the el8186 is an input bias cancelling circuit. the transistors are still biased with an adequate current for speed but the cancelling circuit sinks most of the base curren t, leaving a small fraction for input bias current. the el8186's ground-sensing input amplifier takes advantage of many slew-rate-enhancing techniques that cannot be implemented to an amplifier with a dual pair rail- to-rail input. hence, compared to other operational amplifiers with a dual pair rail-to-rail input with comparable supply currents, the el8186 slew rates are several times faster. charge pump the el8186 has a built-in charge pump to increase the input range up to the positive supply rail. the charge pump provides an internal supply voltage to bias the input stage enabling a ground-sensing conf iguration to swing from ground to v dd . the charge pump, operating at around 3mhz, is transparent to the user. the el8186 is adequately bypassed inside the chip and will perform quietly. there is no need for a dedicated external bypass capacitor, minimizing components. enable/disable feature the el8186 offers an en pin. the active low enable pin disables the device when pulled up to at least 2.2v. upon disable the part consumes typi cally 3a, while the output is in a high impedance state. the en also has an internal pull down. if left open, the en will pull to negative rail and the device will be enabled by default. rail-to-rail output stage a pair of complementary mosfet devices achieves rail-to- rail output swing. the nmos sinks current to swing the output in the negative directio n. the pmos sources current to swing the output in the posi tive direction. the el8186 with a 100k ? load will swing to within 3mv of the supply rails. el8186
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